高鐵時刻表南下查詢

1. Copy syncad.lic to install-directory
2. Set system Environment Variable SYNCAD_LICENE_FILE=%installdir%\syncad.lic
voila! Ready to run
內容說明:


SynaptiCAD是一款行業用電腦輔助設計工具，與HDL輸入、仿真、測試、波形分析、管腳
映射工具等等EDA（電子設計自動化）工具集合， 組成了一套完整的EDA方案。這是該系
列的全部軟體；它們包括9種功能強大的工具：TestBencher Pro；BugHunter Pro；
VeriLogger Pro；WaveFormer Pro；SimuTAG；PinPort；DataSheet Pro；
Timing Diagrammer Pro；Gigawave Viewer。
英文說明:


Want a powerful, yet easy to use simulation environment?
SynaptiCAD's simulation and debugging tools provide a
standard interface for controlling all of your simulation
tools. SynaptiCAD's timing diagram editors have the most
extensive and accurate timing analysis features available in
any timing diagram editor on the market including delay
correlation, reconvergent fan-out, and clocks that model
jitter and buffer delays. Three different levels of editing
let you pick the best price and feature set for your
application.

Free yourself from the time-consuming process of manually
writing Verilog, VHDL, and SystemC test benches. Generate
them graphically from timing diagrams. SynaptiCAD provides 3
levels of test bench generation to meet all your design
needs. SynaptiCAD offers support for the latest test
equipment and emulation technologies allowing you to port
your simulation and timing analysis data to your prototyping
environment.


SynaptiCAD AllProducts v12 04a 英文正式版(電腦輔助設計軟體)